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Stingray
Account closed
Registered: Feb 2003
Posts: 117 |
FASTER 3D GRAPHICS
I've heard it said before that the way the VIC chip addresses memory (8x8 cells) makes it slower fo rendering graphics because of the extra calculations needed. So what way would you have had the Commodore engineers design an alternative addressing mode so that 3D graphics could be calculated quicker? I would realy appreciate your ideas on this. |
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Oswald
Registered: Apr 2002
Posts: 5029 |
"Is "Direct Loader" a good enough name for this part of the circuit?"
yeah, but the data Direct Loader loads I'd still call a display list :) maybe register list, thats a bit closer to whats happening. |
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Graham
Account closed
Registered: Dec 2002
Posts: 990 |
A display list is just what the name says: a list of modes to display. No registers involved. Some circuit doing register loads is not a display list. |
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Oswald
Registered: Apr 2002
Posts: 5029 |
graham, for god's sake please stop being mr smartass.
1. nobody said display list can write to video regs
2. it doesnt matter if strictly speaking registers are involved or not what happens is almost the same. (and I suggested register list because in stingray's implementation registers would be involved!)
3. a display list is more than JUST a list of modes. (interrupts, bitmap start addy, blank lines, scrolling)
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Krill
Registered: Apr 2002
Posts: 2855 |
While "VIC-X" sounds cool in English, it's definitely got some drawbacks if you understand German. But then there's a classic demo effect called "wanking", too.. :D
"VIC-X" is still the best name so far.. :) |
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PopMilo
Registered: Mar 2004
Posts: 145 |
Quoting stingray
...Just to put it a simpler way, you can load any value into any VIC register on any of the 19656 cycles that make up a screen, as long as it's not a badcycle...
This sounds like 'keep hardware simple and let the software do all the extra stuff', and I like it :)
This would make sprite multiplexing easy :)
I would only add that if it is possible you should make more registers available for change. For example some kind of relative address offset that would be one byte and would be added to current VIC memory fetch address in every cycle.
Then It would be possible to duplicate lines with only changing that offset once each line - 200 cycles for making Nx100 resolution instead of thousands needed so far...
Wait .... If that register is internal on your device than these kinds of 'internal writes' maybe don't need to take cycles from CPU ?
Any help from hardware will boost any existing 3d project out there and inspire new ideas :)
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Graham
Account closed
Registered: Dec 2002
Posts: 990 |
@Oswald: A lot of posts refer to doing "display lists" for register writes. Just read some of the recent posts. |
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QuasaR
Registered: Dec 2001
Posts: 145 |
Me likes Notorious V.I.C. but maybe it's too long... ;) |
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Oswald
Registered: Apr 2002
Posts: 5029 |
Quote: @Oswald: A lot of posts refer to doing "display lists" for register writes. Just read some of the recent posts.
I believe people simply spared the time writing this: "(yes I know that a display list does not write registers, but I am just using loosely this term because it comes close to this thing)"
I would think Martin & Krill are smart enough to know what atari display lists are exactly. |
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Krill
Registered: Apr 2002
Posts: 2855 |
Yeah, without knowing both the Atari ANTIC and Amiga Copper lists in detail, I think our register list here is something in between the two. It writes actual registers and does not just switch modes, but only on the video chip (plus DMA for the 16kB of RAM visible to it), but cannot write the registers of the other chips on the bus.
But that's an academic discussion, so we should rather discuss the best way to implement this list so the overhead required to both execute and generate it is minimal. |
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Oswald
Registered: Apr 2002
Posts: 5029 |
how about this:
have a list of registers and values to write for each line, and you can specify horizontally the cycle where it should start stuffing the regs. HW would buffer up the needed regs and values one line before.
list would look like:
$horizontal,$reg,$val,$reg,$val,$ff
$horizontal,$reg,$val,$reg,$val,$ff
$horizontal,$reg,$val,$reg,$val,$ff
$ff
$ff= stop/do nothing
$horizontal each line could be skipped and just set up by the cpu once, for most stuff it would be a constant anyway I guess.
$ff could be skipped aswell if we maintain a constant nr of regs&vals. some dummy color reg writes wont hurt. |
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